CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.
Sagar Karandikar, Ani Udipi, JunSun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Antero Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
International Symposium on Computer Architecture (ISCA).
June 2023.
[Abstract]
[PDF]
EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching.
Nayana Prasad Nagendra*, Bhargav Reddy Godala*, Ishita Chaturvedi, Atmn Patel, Svilen Kanev, Tipp Moseley, Jared Stark, Gilles A. Pokam, Simone Campanoni, and David I. August
International Symposium on Computer Architecture (ISCA).
June 2023.
[Abstract]
[PDF]
AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.
Grant Ayers*, Nayana Prasad Nagendra*, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan
International Symposium on Computer Architecture (ISCA).
June 2019.
[Abstract]
[PDF]
Mallacc: Accelerating memory allocation.
Svilen Kanev, Sam (Likun) Xi, Gu-Yeon Wei, David Brooks
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS).
April 2017.
[Abstract]
[PDF]
[Slides]
[Code]
Profiling a Warehouse-Scale Computer.
Svilen Kanev, Juan Pablo Darago, Kim Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David Brooks
International Symposium on Computer Architecture (ISCA).
June 2015.
[Abstract]
[PDF]
[Slides]
Tradeoffs between Power Management and Tail Latency in Warehouse-Scale Applications.
Svilen Kanev, Kim Hazelwood, Gu-Yeon Wei, David Brooks
International Symposium on Workload Characterization (IISWC).
October 2014.
[Abstract]
[PDF]
[Slides]
HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs.
Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David Brooks
International Symposium on Computer Architecture (ISCA).
June 2014.
[Abstract]
[PDF]
Characterizing and Evaluating Voltage Noise in Multi-Core Near-Threshold Processors.
Xuan Zhang, Tao Tong, Svilen Kanev, Saekyu Lee, Gu-Yeon Wei, David Brooks
International Symposium on Low Power Electronics and Design (ISLPED).
September 2013.
[PDF]
XIOSim: Power-Performance Modeling of Mobile x86 Cores.
Svilen Kanev, Gu-Yeon Wei, David Brooks
International Symposium on Low Power Electronics and Design (ISLPED).
July 2012.
[PDF]
Portable Trace Compression through Instruction Interpretation.
Svilen Kanev, Robert Cohn
International Symposium on Performance Analysis of Systems and Software (ISPASS).
April 2011.
[PDF]
Voltage Smoothing: Characterizing and Mitigating Voltage Noise in a Production Processor Using Software-Guided Thread Scheduling.
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks
International Symposium on Microarchitecture (MICRO).
December 2010.
[PDF]
AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.
Nayana Prasad Nagendra*, Grant Ayers*, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan
IEEE Micro's Top Picks in Computer Architecture Conferences.
May 2020.
[Link]
Automatically Accelerating Non-Numerical Programs by Architecture-Compiler Co-Design.
Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David Brooks
Communications of the ACM Research Highlights.
December 2017.
[PDF]
Profiling a Warehouse-Scale Computer.
Svilen Kanev, Juan Pablo Darago, Kim Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David Brooks
IEEE Micro's Top Picks in Computer Architecture Conferences.
June 2016.
[PDF]
CARB: A C-State Power Management Arbiter For Latency-Critical Workloads.
Xin Zhan, Reza Azimi, Svilen Kanev, David Brooks, Sherief Reda
IEEE Computer Architecture Letters (CAL).
March 2016.
[PDF]
Voltage Noise in Production Processors.
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks
IEEE Micro's Top Picks in Computer Architecture Conferences.
February 2011.
[PDF]
RETROSPECTIVE: Profiling a warehouse-scale computer.
Svilen Kanev, Juan Pablo Darago, Kim Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David Brooks
ISCA@50 25-Year Retrospective: 1996-2020.
June 2023.
[PDF]
Efficiency in warehouse-scale computers: a datacenter tax study.
Svilen Kanev
PhD thesis.
September 2016.
[PDF]
Breaking Cyclic-Multithreading Parallelization with XML Parsing.
Simone Campanoni, Svilen Kanev, Kevin Brownell, Gu-Yeon Wei, David Brooks
International Workshop on Parallelism in Mobile Platforms (PRISM).
June 2014.
[Abstract]
[PDF]
Measuring Code Optimization Impact on Voltage Noise.
Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David Brooks, Vijay Janapa Reddi
Workshop on Silicon Errors in Logic -- System Effects (SELSE).
March 2013.
[PDF]
Motivating Software-Driven Current Balancing in Flexible Voltage-Stacked Multicore Processors.
Svilen Kanev
Bachelor's thesis.
May 2012.
[PDF]